2015 Finalists (Winners in Red)

 

 

 

 

Approximate Computing on Zynq


Arun Chandrasekharan
Supervisor: Dr. Daniel Grosse
University of Bremen
Fast Open Neural Simulator (FONS) on Zynq


Finn Krewer
Supervisor: Dr. Fearghal Morgan
National University of Ireland Galway
Programmable Zynq hardware/software co-design of SQL queries


Gorker Alp Malazgirt
Supervisor: Assoc. Prof. Arda Yurdakul
Bogazici University
Vivado HLS solution of the inverse kinematics problem of a 4-DOF Robot


Fynn Schwiegelshohn
Supervisor: Prof. Michael Huebner
Ruhr University Bochum
Zynq based real-time open access image processing platform


Zheqi Yu
Supervisor: Dr. Shufan Yang
University of Wolverhampton
Recurrant Neural Network with Bi-directional long short-term memory for OCR


Vladimir Rybalkin
Supervisor: Prof. Norbert Wehn
TU Kaiserslautern
Hardware Accelerated VPN using Zynq


Furkan Turan
Supervisor: Prof. Ingrid Verbauwhede
KULeuven
Hardware accelerated motion detection application on zedboard


Munish Jassi, Jian Lyu, Yong Hu
Supervisor: Prof. Ulf Schlichtmann
Technische Universitat Universitat
Zynq-based HD EMG Prosthesis Controller


Linus Witschen, Georg Thombansen
Supervisor: Dr. Alexander Boschmann
Paderborn University
Beye: Zynq based retinal vessel segmentation


Marco Bacis, Lara Cavinato, Irene Fidone
Supervisor: Prof. Marco Domenico Santambrogio
Politecnico di Milano
ProFAX: Protein folding on FPGA


Lorenzo Di Tucci, Giulia Guidi
Supervisor: Prof. Marco Domenico Santambrogio
Politecnico di Milano
High speed FPGA DAQ system with EDA and EKG extension


Niculescu Vlad, Hutanu Ovidiu Emanuel
Supervisor: Dr. Placinta Vlad Mihai
Politehnica University of Bucharest
FPGA Based All-Digital Multi-protocol RFID Reader


João Ricardo Borges dos Santos
Supervisor: Prof. Arnaldo Oliveira
University of Aveiro
Brain NE(CS)Twork on FPGA


Marco Bottino, Pierandrea Cancian, Guido Walter Di Donato
Supervisor: Prof. Marco Domenico Santambrogio
Politecnico di Milano
exaFPGA Accelerate Stencil Cell calculation


Giuseppe Natale
Supervisor: Prof. Marco Domenico Santambrogio
Politecnico di Milano
Approximate Computing on Zynq


Arun Chandrasekharan
Supervisor: Dr. Daniel Grosse, University of Bremen Fast Open Neural Simulator (FONS) on Zynq


Finn Krewer
Supervisor: Dr. Fearghal Morgan, National University of Ireland Galway Programmable Zynq hardware/software co-design of SQL queries


Gorker Alp Malazgirt
Supervisor: Assoc. Prof. Arda Yurdakul, Bogazici University Vivado HLS solution of the inverse kinematics problem of a 4-DOF Robot


Fynn Schwiegelshohn
Supervisor: Prof. Michael Huebner, Ruhr University Bochum Zynq based real-time open access image processing platform


Zheqi Yu
Supervisor: Dr. Shufan Yang, University of Wolverhampton Recurrant Neural Network with Bi-directional long short-term memory for OCR


Vladimir Rybalkin
Supervisor: Prof. Norbert Wehn, TU Kaiserslautern Hardware Accelerated VPN using Zynq


Furkan Turan
Supervisor: Prof. Ingrid Verbauwhede, KULeuven Hardware accelerated motion detection application on zedboard


Munish Jassi, Jian Lyu, Yong Hu
Supervisor: Prof. Ulf Schlichtmann, Technische Universitat Universitat Zynq-based HD EMG Prosthesis Controller


Linus Witschen, Georg Thombansen
Supervisor: Dr. Alexander Boschmann, Paderborn University Beye: Zynq based retinal vessel segmentation


Marco Bacis, Lara Cavinato, Irene Fidone
Supervisor: Prof. Marco Domenico Santambrogio, Politecnico di Milano ProFAX: Protein folding on FPGA


Lorenzo Di Tucci, Giulia Guidi
Supervisor: Prof. Marco Domenico Santambrogio, Politecnico di Milano High speed FPGA DAQ system with EDA and EKG extension


Niculescu Vlad, Hutanu Ovidiu Emanuel
Supervisor: Dr. Placinta Vlad Mihai, Politehnica University of Bucharest FPGA Based All-Digital Multi-protocol RFID Reader


João Ricardo Borges dos Santos
Supervisor: Prof. Arnaldo Oliveira, University of Aveiro Brain NE(CS)Twork on FPGA
Approximate Computing on Zynq


Arun Chandrasekharan
Supervisor: Dr. Daniel Grosse
University of Bremen
Fast Open Neural Simulator (FONS) on Zynq


Finn Krewer
Supervisor: Dr. Fearghal Morgan
National University of Ireland Galway
Programmable Zynq hardware/software co-design of SQL queries


Gorker Alp Malazgirt
Supervisor: Assoc. Prof. Arda Yurdakul
Bogazici University
Vivado HLS solution of the inverse kinematics problem of a 4-DOF Robot


Fynn Schwiegelshohn
Supervisor: Prof. Michael Huebner
Ruhr University Bochum
Zynq based real-time open access image processing platform


Zheqi Yu
Supervisor: Dr. Shufan Yang
University of Wolverhampton
Recurrant Neural Network with Bi-directional long short-term memory for OCR


Vladimir Rybalkin
Supervisor: Prof. Norbert Wehn
TU Kaiserslautern
Hardware Accelerated VPN using Zynq


Furkan Turan
Supervisor: Prof. Ingrid Verbauwhede
KULeuven
Hardware accelerated motion detection application on zedboard


Munish Jassi, Jian Lyu, Yong Hu
Supervisor: Prof. Ulf Schlichtmann
Technische Universitat Universitat
Zynq-based HD EMG Prosthesis Controller


Linus Witschen, Georg Thombansen
Supervisor: Dr. Alexander Boschmann
Paderborn University
Beye: Zynq based retinal vessel segmentation


Marco Bacis, Lara Cavinato, Irene Fidone
Supervisor: Prof. Marco Domenico Santambrogio
Politecnico di Milano
ProFAX: Protein folding on FPGA


Lorenzo Di Tucci, Giulia Guidi
Supervisor: Prof. Marco Domenico Santambrogio
Politecnico di Milano
High speed FPGA DAQ system with EDA and EKG extension


Niculescu Vlad, Hutanu Ovidiu Emanuel
Supervisor: Dr. Placinta Vlad Mihai
Politehnica University of Bucharest
FPGA Based All-Digital Multi-protocol RFID Reader


João Ricardo Borges dos Santos
Supervisor: Prof. Arnaldo Oliveira
University of Aveiro
Brain NE(CS)Twork on FPGA


Marco Bottino, Pierandrea Cancian, Guido Walter Di Donato
Supervisor: Prof. Marco Domenico Santambrogio
Politecnico di Milano
exaFPGA Accelerate Stencil Cell calculation


Giuseppe Natale
Supervisor: Prof. Marco Domenico Santambrogio
Politecnico di Milano


Marco Bottino, Pierandrea Cancian, Guido Walter Di Donato
Supervisor: Prof. Marco Domenico Santambrogio, Politecnico di Milano exaFPGA Accelerate Stencil Cell calculation


Giuseppe Natale
Supervisor: Prof. Marco Domenico Santambrogio, Politecnico di Milano

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Open Hardware 2019