Why Zynq?

SDSoC and HLS highlights

Zynq Architecture

Targeting Zynq with IP Integrator

Embedded System Design (Zynq) highlights

SDSoC Overview

Vivado HLS Getting started

Vivado HLS Technical Overview

Xilinx FPGA Design highlights

Vivado IP Integrator

Packaging IP

Customizing and Instantiating IP

Free training Videos

Online Resources

FPGA Resources

• Xilinx forums
• Digilent Board Documentation 
• Digilent Classroom

Zynq Resources

• Xilinx SDSoC
• The Zynq Book The best selling Zynq Book - available as a free ebook download
• MicroZed chronicles ebook 

PYNQ Resources

• PYNQ.io
• PYNQ GitHub
• PYNQ documentation
• PYNQ support forum

Xilinx Linux Resources

• Xilinx Linux Wiki
• Xilinx Linux Technical Articles
• Zybo Linux Tutorial

​​Xilinx University Program Webpage

• XUP AWS F1 information

Xilinx University Program Webpage

• www.xilinx.com/university

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xup@xilinx.com  | www.xilinx.com/university 

Open Hardware is run in partnership by the Xilinx University Program, the Europractice Software Service (STFC), and CNFM

Open Hardware 2021